The present invention relates, in general, to semiconductor devices, and more particularly, to a novel low leakage current semiconductor device.
Previously, the semiconductor industry had used impurity induced disordering (IID) to assist in providing minority carrier confinement in III-V compound semiconductor devices such as light emitting diodes (LEDs), lasers, heterojunction bipolar transistors, and the like. These previous impurity induced disordering (IID) techniques generally involved diffusing a dopant or impurity into a semiconductor structure in order to cause migration of the semiconductor material. The migrated semiconductor material created an energy barrier that assisted in confining minority carriers. The source of the dopant generally was a material that was applied to the device structure and heated to diffuse the dopants from the source material into the semiconductor structure. Use of such IID techniques required accurate placement of the source material in order to control the dopant's location and concentration within the semiconductor device. Inaccurate placement often created leaky P-N diodes which increased the device's leakage current.
In addition, semiconductor devices that used IID usually exhibited a sensitivity to high temperatures, such as those encountered during rapid thermal anneal procedures. During high temperature annealing of the device's metal electrodes, the device's passivation layer functioned as a dopant or impurity source from which dopants were diffused into the semiconductor device thereby enlarging the device's leaky P-N diode and increasing the device's leakage current.
Accordingly, it is desirable to have a method of controlling minority carriers near lateral edges of a P-N junction wherein the method is insensitive to subsequent high temperature processing operations, and is independent of the placement of a dopant source material.